Srikiran Devarabhotla

About

• Have Industry Experience in VLSI Backend, Synthesis and DFT. • Managed a Team of 40+ Engineers and 3 Leads with 6 Direct Reports and trained many in Backend domain. • Experience in SOC Level Implementation, have Taped-out 4 SOCs ( 2 Test Chips ). • Have Experience in Netlist to GDSII complete flow and participated in 20+ Tape-outs successfully with Technology ranging from 130nm to 3nm which includes 4 SOC Level. • Experience in STA Closure for which includes Constraints Validation/Correction, Timing Correlation PD Tool to STA Signoff Tool, ECO Generation using Tweaker/DMSA for 200+ Scenarios and ECO Implementation. • Have Experience in working on DFT - Did Scan Insertion, Coverage Improvement using Visualizer, MBIST Insertion, TDL Generation and Verification, JTAG Insertion etc.,. Run simulations for testing the Vectors and finding the faults.